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EIM bus access serialized across cores?

Question asked by Joshua Clayton on Apr 1, 2015
Latest reply on Apr 2, 2015 by Joshua Clayton

We have an application that uses the EIM bus to communicate with and FPGA.

There is an additional device connected to the FPGA, which communicates through the fpga by means of the EIM bus,

and has its own interrupts.

There is also a userspace program accessing registers via the EIM bus, which has been mmapped for direct access.

Thats a driver, two irqs, and a threaded application that may all be trying to read or write the EIM bus.


This was not my design, but I am wondering: does the IMX.6 serialize access to the EIM Bus, or do I have a race condition?