We're trying to boot from QSPI on the LS1021a twr board and we seem to be running into some problems. According to the LS1021 documentation, when the board is configured to boot from QSPI and comes out of reset, a READ command (0x03) is issued over the QSPI bus in an effort to begin reading in configuration information about the attached flash. We've managed to hook up an oscilloscope and monitor the pins between the LS1021 and the QSPI flash and we see an attempt at sending the READ command (we assume), but it appears that we do not read an 0x03 on the bus (we have attached screen captures of the clock and DQ0 lines). We witness multiple instances of the 0x03 command on the bus with no data being returned. This leads us to believe that the LS1021a is stuck continuously issuing it's QSPI boot process.
Below is the full interaction we see between the LS1021a and the QSPI flash 300us after power on reset deassertion.
Below is zoomed in on the very beginning of the interaction between the LS1021a and the QSPI, where we believe the 0x03 is to be sent. But the timing of the signals below leads us to believe that a value of 0x03 is not being clocked in to the QSPI.
Are we correct in assuming that the QSPI flash must first be in its default single bit SPI (non-Quad mode) and also in XIP mode? It is our understanding that the QSPI controller eventually sets the flash into these modes, and that they need not be enable on power up. Is that line of thinking correct?