I am working in a project with the i.MX 6 Solo and would like to implement software self-tests on the CPU that are specified by IEC 61508. Now IEC 61508 states that self-tests can be performed by writing/reading a walking-bit pattern to the registers of the CPU. The specific registers that are mentioned are: data, address, instruction decoder.
The problem is that I only have basic knowledge when it comes to CPU architecture, so would like to know how a test like this would be implemented. How do I know which registers that I need to write/read, and I guess that the tests need to be written i asm?
I know that some of the smaller and less advanced MCU’s have software libraries for these kinds of tests, but I have not found any for the i.MX 6 family.
So any help is really appreciated.
Here's an excerpt from IEC 61508:
“Self-test by software: walking bit (one-channel)
Aim: To detect, as early as possible, failures in the physical storage (for example registers) and instruction decoder of the processing unit.
Description: The failure detection is realised entirely by additional software functions which perform self-tests using a data pattern (for example walking-bit pattern) which tests the physical storage (data and address registers) and the instruction decoder. However, the diagnostic coverage is only 90 %.”