AnsweredAssumed Answered

Can not get KL27 current draw down to expected values (in VLPS mode).

Question asked by rick stuart on Mar 25, 2015
Latest reply on Mar 26, 2015 by rick stuart



I am messing with various KL27 low current modes on the Freescale FRDM-KL27Z development board.  Right now I want to:


1. Turn off the 48MHz clock.

2. Turn on the 2MHz clock.

3. Route the 2MHz clock to TPM0 timer.

4. Enter VLPS mode.

5. Draw 100uA or less (really was expecting less than half that).

6. Get woken up by the TPM0 timer interrupt.


However, step 5 is drawing 187uA!!


(Note, the processor is waking up about every 3 seconds, flashes the RGB LED on the FRDM-KL27Z development board then goes back to VLPS mode.  So the program is doing what I want.)


The current value for the 2MHz clock can be found in Freescale document KL27P64M48SF2.pdf.  There in table 10 it states the typical value is 25uA for turning on the 2MHz clock.


Now here is what I don't understand:


When I turn off the 2MHz internal reference clock the current drops by about 181uA!


To do this, I change this line of code:

MCG->C1 |= MCG_C1_IRCLKEN_MASK;        // LIRC is enabled.


To this:

///MCG->C1 |= MCG_C1_IRCLKEN_MASK;        // LIRC is enabled.   


Now the TPM0 interrupt does not occur (no surprise there) and the current draw while in VLPS mode is down from 181uA to 5.2uA!  Way more than what I expected based on the 25uA allotment in the Freescale KL27P64M48SF2.pdf document.  I suspect there is something else running off the LIRC (8MHz/2MHz) clock that I don't see or need.  But I haven't found the culprit - if there is one.  Does anyone have any candidates I could chase down?