we want to enable UART1 transmitter on MK53DN512VLQ10 to transmit data with FIFO functionality using interrupt-driven software approach and we have problem.
We have done next in initialization phase:
- enable transmit FIFO with setting UART1_PFIFO[TXFE]
- flushed transmit FIFO buffer with setting UART1_CFIFO[TXFLUSH]
- set TXWATER to 0
- enable transmitter with setting UART1_C2[TE]
When we want to start transmission we set UART1_C2[TIE].
In every UART1 interrupt service routine we write TXFIFOSIZE(8) datawords in UART1_D register. In last UART1 interrupt service routine we write less than or equal TXFIFOSIZE datawords in UART1_D register and then we reset UART1_C2[TIE]. We read UART1_S1 register before every write dataword to UART1_D in interrupt service routine in order to clear UART1_S1[TDRE] flag.
In some cases UART1 generates interrupt service routine even when transmit FIFO buffer is not empty, even we set UART1_TWFIFO[TXWATER] = 0 in initialization phase. In these cases UART1 generates interrupt service routine even when UART1_S1[TDRE] is not set and when UART1_SFIFO[TXEMPT] is not set.
Please for help.
Please sent us properly example for using FIFO functionality of UART peripheral.