I have debugged the SPI slaver with DMA successfully. But when I found some question that I let this SPI slaver communicate with a SPI master moudle. I think some frames are lost. I think the reason is SPI slaver fill buffer to SPI Tx FIFO and recieve data from Rx FIFO if DMA controller is idle. But as a SPI slaver, once master send data with clock, slaver must recieve it and send data immediately without any pending. So if MCU is busy on memory operation, at the same time SPI master send some data, then some data frames lost. Am I right, and how to deal with the problem. Please give some code or Detailed description, thank you very much.