Hello. I have a question about AIPSTZ1_OPACR2 register in i.MX6Q.
Refer to "13.8.4 Off-Platform Peripheral Access Control Registers (AIPSTZx_OPACR2)" in MCIMX6DQRM(Rev.2).
My customer made original bootloader. But, it couldn't boot up with AIPSTZ1_OPACR2（0x0207c048） = 0x44444444 (=reset value).
They change the AIPSTZ1_OPACR2 from 0x44444444 to 0x00000000.
It can boot successfully!
BSP (L2.6.38_11.11.01_ER_source) had already cared the AIPSTZ1_OPACR2 from 0x44444444 to 0x00000000 in "lowlevel_init.S".
Refer to attached file (L71~L97).
Q1: Why is it necessary to clear the AIPSTZ1_OPACR2 register to 0?
Q2: What meaning of SP bit?
Original Attachment has been moved to: lowlevel_init.S.zip