i.MX6SoloX load M4 bin from sd to DDR and run on DDR

[LPs]

Hi all,

   I'm using a 6SX-SABRE-SDB board.

At the moment, booting kernel from DDR and M4 core from qspi, all is working well.

What I want to do is to remap M4 MQX application to be run into DDR.

There is (somewhere) a guide that explain the M4 boot sequence and how to remap/link and config application to be played from DDR?

[alejandrolozan1]

Hi,

I have not tried this, but there are a few things that you have to keep in mind:

1.- The M4 application needs to be linked to DDR. This is done in the .icf files for IAR, .ld for gcc. You will have to modify these files so the application is linked to other memory range.

2.-  We need to check if the m4boot command in U-boot starts the M4 from an specific location (QSPI) if so, U-boot source code has to be modified.

3.- If DDR is shared (if possible I need to double check this) with the A9 some part needs to be reserved from the M4 and A9 does not have to touch this region.

Best Regards,

Alejandro

[LPs]

Hi Alejandro,

At the moment the system is starting with U-Boot and linux kernel from SD. This means that A9 run int DDR region.

So far I did:

1. Test the pingpong example mapped in QSPI2. It works well.
2. Changed the linker script (icf, I'm using IAR) of pingpong example to have the ROM region inside the DDR Region (eg. 0x84000000).
3. At the start of U-Boot I stop and copy the remapped .bin file to the correct address (eg. fatload mmc ${mmcdev}:${mmcpart} 0x84000000 myRemapped.bin)
4. Used command bootaux of U-Boot to start M4 application (eg. bootaux 0x84000000 and I tried bootaux 0x8400400 also)

Those steps don't seem to work.

As a test I modify the standard pingpong exaple to modify some bytes at 0x84000000, an address inside the DDR region, and it works well. This means that the M4 has rights to the DDR region.

Could you help me to understand what is mandatory to know/modify to make a M4 firmware running in DDR?