I am a newbie for MCU/SWD programming.
Currently, I encounter a problem about mass erasing for secured MKE02Z64 via SWD.
I perform unsecuring steps by following the steps of section 220.127.116.11 in KE02 sub-family reference manual as followings.
1. Reset the device by asserting RESET pin or DAP_CTRL.
2. Set DAP_CTRL bit to invoke debug mass erase via SWD Functional description
3. Release reset by deasserting RESET pin or DAP_CTRL bit via SWD.
4. Wait till DAP_CTRL bit is cleared ( After mass erase completes, DAP_CTRL
bit is cleared automatically). At this time, CPU will be in hold state, MASS erase is
completed, and the device is in unsecure state (flash security byte in flash
configuration field is programmed with 0xFE) .
5. Reset the device.
After performing step 1 ~ 3, I still cannot wait for the DAP_CTRL bit is cleared.
I don't know whether I miss something in the steps.
Does the DAP_CTRL bit mean MDM-AP control register bit 0 ?
If not, how can I get the DAP_CTRL bit ?
Thanks for your help ~