we met a problem when we use CW TAP connected with T1040RDB in differential clock mode, switches SW3: ON(0): single-clock source using diff_sys_clk, it shows "ccs protocol plugin: ccs_config_chain; ccs_error = 39 failed to correctly configure JTEG chain",
but we will connect successfully with single clock mode (set switches SW3: OFF(1):SYSCLK clock source).
Attached files shows the console LOG info and the RCW override file for diff mode. the RCW override file also is OK for single clock mode.
Pls help to analysis it.
Thanks a lot.
Original Attachment has been moved to: T1040RDB_single.txt.zip
Original Attachment has been moved to: T1040RDB_RCW_1400_600_1600.txt.zip
Original Attachment has been moved to: T1040RDB_diff.txt.zip