The current datasheet for the KM series only outlines the 16 bit ADC specifications.
What is the 24 bit ADC specifications, specifically SINAD and ENOB?
You can find the 24-bit specs in the following chapter: 188.8.131.52 ΣΔ ADC Standalone specifications of the devices datasheet, the document can be downloaded from the following link:
If the MCU run at 50Mhz clock and sampling with 24 bit resolution, do you know how fast can it sampling?
The SD ADC conversion rate depends on the modulator clock (fmclk) and selected oversampling ratio (OSR). Datasheet parameters of the SD ADC (for normal operation) are specified for fmclk=6.144MHz and OSR=2048, where such configuration results in 3 ksps output sample. You can go down with OSR to 64, which will increase output sample rate to 96 ksps still providing 24-bit result but with lesser noise free bits (~ -2.8 bits).
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