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i.MX502 power-up sequence

Question asked by Nori Shinozaki on Feb 17, 2015
Latest reply on Feb 17, 2015 by Nori Shinozaki



I'm creating i.MX502 power-up sequence by referring to SDG and the EVK schematics.

I found 3.15V including VDD3P0 is supplied by DC/DC, not by MC34708.

Then it looks the DC/DC is enable by GPIO after the CPU core startups.

Is this correct?



In the case, the VDD3P0 is almost the last to be enabled

Are VDD2P5, VDD1P8, VDD1P2 Ok to be enabled before VDD3P0?


Best regards,

Nori Shinozaki