I have a question about i.MX6SDL, i.MX6DQ DDR design.
Please see No.4 of Table 1-1 in IMX6DQ6SDLHDG "Rev.0".
It says "DRAM_SDCKE0 and DRAM_SDCKE1 should be connected to individual 10 kΩ5% resistors to GND."
On the other hand, No.4 of Table 2-1 in IMX6DQ6SDLHDG "Rev.1", It says "DRAM_SDCKE0 and DRAM_SDCKE1 no longer require external 10 kΩresistors to GND to minimize current drain during deep sleep mode (DSM)."
In fact, I got a following reply in past in SR# 1-1132121434.
Internal pull down resistor of 100 KOhm provides relatively “weak” pulling down.
Why the recommended disign was changed?
This weak pull down issue have been fixed?