We are using the QuadSPI-Interface via PF..PF Pins. We drive the interface on 61MHz. On the other side there is a QuadSPI Flash from Spansion We have EMC spikes Issues on multiplied frequencies e.g. 682MHz. It can be measured that the clock line is mostly cause with highest emc in near field mesaurement. We have series resistors in line and can controll overshot with them, but this does not bring improve in the device's EMC. I checked the registers and found the possibility for making pin's rise times slower, but this does not work on clock lines.
Besides optimizing the layout --which might not help much as playing with the series resistors did not help- do you see any other settings which might help?
Thanks for ideas,