I'm using a kernel 3.10.17_1.0.0_ga.
My codec is a WM8740 and must be driven by an external clock. IMX can provide this oversampling clock with I2S master mode and SYS_CLK_EN=1.
I'm facing an issue with the fsl_ssi_set_dai_sysclk in fsl_ssi.c which is not calculating correctly the sys clock according to the bitclock requested.
When asking 2822400 which is 44100 * 2 * 32, the sys clock which is calculated is too high(79Mhz instead of 11.2896MHz) as PM (13) for common use of codec such as WM8740.
So i wrote a patch to fix this issue and get acceptable sysc clock.
But concerning higgh frequency such as 192kHz, we are not able to respect this comment as I disabled the check part in the patch.
The bclk rate must be smaller than 1/5 sysclk rate */
So I would like to confirm first the patch i applied to fsl_ssi.c and understand why this comment in the code and in the IMX6Q's documentation.