Clarification about Xgate

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Clarification about Xgate

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rahulkrishna
Contributor IV

Hi,

 

Suppose if i implement any module like SPI or CAN using Xgate, then the successful transmission or reception of these modules will trigger the Xgate interrupts, which then will update the corresponding buffers. But my doubt is how does the s12x processer know that the new data is available? As I am doing all the processing at the s12x end. Do i have only the option of polling the shared data? Is it a disadvantage of

implementing in Xgate? Or do i have any method to trigger the s12x when new data is available?

 

Thanks in advance,

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ZhangJennie
NXP TechSupport
NXP TechSupport

Hi rahul,

please looked at the example code supplied with the CodeWarrior installation? In the directory {CW5.1 install}\(CodeWarrior Examples)\HCS12X\HCS12X_XGATE_SoftwareRequest is an example program that demonstrates communications between the HCS12X core and the XGATE, via Software Request interrupts. That might not be exactly what you're looking for, but it would be a starting point.

Also have a look at AN3144 which contains an example showing the sharing of a simple buffer.

does this answer your question?


Have a great day,
Zhang Jun

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HSW
NXP Employee
NXP Employee

Hello Rahul,

Here is short video that demonstrates how interrupt driven communication between the XGATE and the CPU works:

Concurrent Computing in XGATE Apps - Part 1|Freescale

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rahulkrishna
Contributor IV

The video was very useful and cleared lot of my doubts, thank you so much.

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ZhangJennie
NXP TechSupport
NXP TechSupport

hi Rahul,

Attached is the sample code including how to share data in both XGATE and CPU. This is a simple project with three kind of objects :

  • A data structure used exclusively by the Xgate
  • A data structure used by both The Xgate and the CPU.
  • A data structure used only by the CPU.

Here is something you need to pay attention:

  • Make sure that memory areas used by Xgate are defined with an ALIGN 2[1:1]  keyword on the prm file.
  • Make sure that structures shared between the CPU and the Xgate are defined with a  #pragma push -  #pragma align on - #pragma pop  statement, so that both xgate and cpu compilers agree on the field alignment.
  • For Xgate data that is used by the CPU (even if only read), include the appropiate __PAGE_SEG together inside the #pragma statement that describes the location of the variable. 
  • Especially, Xgate vector table must be declared with a #pragma __GPAGE_SEG qualifier
  • If Xgate is accessing flash, either for const data or program code, avoid using flash pages E0 – E7 for CPU data or code.

Can this help you?


Have a great day,
Zhang Jun

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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rahulkrishna
Contributor IV

Hi Zhang Jun,

Thankyou for the reply. But my doubt is, I implemented CAN using Xgate interrupts. So, when a new message comes the Xgate interrupt is triggered and the common buffer between S12x and Xgate is updating, but S12x does not know that new message has received and it needs to keep polling the buffer. Is it the correct way of implementation? Or is there any way that i can inform both S12x and Xgate at the same time that new message has arrived and data is updated? I don't know if i explained my question properly?


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ZhangJennie
NXP TechSupport
NXP TechSupport

Hi rahul,

please looked at the example code supplied with the CodeWarrior installation? In the directory {CW5.1 install}\(CodeWarrior Examples)\HCS12X\HCS12X_XGATE_SoftwareRequest is an example program that demonstrates communications between the HCS12X core and the XGATE, via Software Request interrupts. That might not be exactly what you're looking for, but it would be a starting point.

Also have a look at AN3144 which contains an example showing the sharing of a simple buffer.

does this answer your question?


Have a great day,
Zhang Jun

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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rahulkrishna
Contributor IV

thank you very much. Yes now i understood.

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ZhangJennie
NXP TechSupport
NXP TechSupport

you are welcome!

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