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About CLKx_N voltage in i.MX6DQ.

Question asked by Keita Nagashima on Feb 3, 2015
Latest reply on Feb 4, 2015 by Keita Nagashima

Hi All,

 

Refer to Table 2-7. Oscillator and clock recommendations in Hardware Development Guide for i.MX 6, Rev. 1.

There is below description.

======

Alternatively, a single-ended signal can be used to

drive a CLKx_P input. In this case, the corresponding

CLKx_N input should be tied to a constant voltage

level equal to 50% of VDD_HIGH_CAP.

======


TIA/EIA-644 standard.sect.4.2.4 defines allowable common voltage range as +0.050 V to +2.350 V.

So CLKx_P voltage can be applied to 2.350V.

Which is right voltage for CLKx_N?

1. CLKx_N level equal to 50% of VDD_HIGH_CAP.

  (VDD_HIGH_CAP=2.5V, so CLKx_N=1.25V)

2. CLKx_N level equal to 50% of CLKx_P.

  (CLKx_P=2.35V, so CLKx_N=1.175V)

 

Best Regards,

Keita

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