Roberto Gomez

56F8367  CW8.0  Problems with the SPI at 30 MHz

Discussion created by Roberto Gomez on Oct 8, 2007
Latest reply on Nov 13, 2007 by Peter Becher

Hi all,

I am trying to communicate two ADC’s from Analog Devices (one AD7676 and one AD7663) with a CPU 56F8367 by the SPI port. In fact, now I am using the MC56F8367EVME with the CodeWarrior and obviously programming with the Processor Expert beans. The ADC’s are connected in a daisy channel configuration in order to use only one SPI port in the DSP. In this configuration, the behaviour of both ADC is the same as only one. In fact, the clock of the DSP (obviously the master in my system is the DSP) drives both ADCs. The rise edge of the clock updates the output of the ADC (MOSI pin) and with the fall edge of the clock this updated data is being read.

When I adjust the speed of the SPI peripheral up to 15 MHz the system works properly. The problem appears when the clock is adjusted at 30 MHz. I have saw with the oscilloscope that the MOSI pin is correctly updated with the clock, but the SPI always have problems with the first bit. In fact at this speed, this first read bit always has the logical value of the MOSI before the actualization. Due to this bad behaviour always the correct string is shifted one bit to the right.

I have tested the configuration of the SPI (seeing the register values) and it seems that the processor expert is working properly.

This is my configuration

The chip select is always low

I start the process writing a word in the SPDTR register of the SPI. The idea is to activate the clock.

The transmission ends when the SPDRR is full (and obviously there is a flag that indicates this event)

CPHA = 1

CPOL = 0

Thank you very much, I am desperate