I still struggle to get a watchdog interrupt in P4080.
I want to signal to Core0 that Core4 got a watchdog timeout. I think this is possible with the MPIC.
These are the relevant setting on Core4:
But when an interrupt occurs, this is what I get
Core4: InterruptHandler: 0xb00 exception.
What I expected was that there is something in the MPIC_WSRSR0.
I also set EDBCR0[EDM] to 0, thanks to lunminliang, but this also didn't help.
The manual (P4080RM p. 340)
The platform indicates to the MPIC that a core watchdog timer event has occurred by
updating the core’s associated field (WRSn) in the MPIC's Watchdog Status Register
Summary Register (WSRSR).
So what else do I need to do so the WSRSR is updated?
Thanks for the help so far.