Mike Larson

MCF5249 Help configure QSPI for transfer.

Discussion created by Mike Larson on Oct 5, 2007
Latest reply on Oct 11, 2007 by Mike Larson
Hello,
 
I'm trying to set up the QSPI to do a transfer of 8 16-bit words.  When I run the code it looks like the transfer performs but I cannot see the signals using an ossillosocpe.  I think it's a hardware problem, my hardware engieere says it's software.  Could someone look over my code and see if anything wrong jumps out at them?  I'm not using QSPI_CS2 and 2, I'm using GPIO21 and 22.  I can verify those are being switched. 
 
Thanks.
 
short Batt1;
 
 SetGPIOOutput (OUTPUT_QSPI_CS2, ACTIVE);
 SetGPIOOutput (OUTPUT_QSPI_CS3, ACTIVE);
 //Set up QSPI (set QSPI bit in PLLREG)
 _REG_PLLCONTROL |= BIT(11);
 _REG_QMR = 0x8102;
 _REG_QDLYR = 0x0202;
 _REG_QIR = 0xD00F;
 _REG_QAR = QSPI_CMD_RAM;
 //Fill Command RAM, 6 16 bit transfers
 _REG_QDR = 0x6000;
 _REG_QDR = 0x6000;
 _REG_QDR = 0x6000;
 _REG_QDR = 0x6000;
 _REG_QDR = 0x6000;
 _REG_QDR = 0x6000;
 _REG_QDR = 0x6000;
 _REG_QDR = 0x6000;
 //Fill Transmit Ram
 _REG_QAR = QSPI_TxD_RAM;
 
 _REG_QDR = 0x0880;
 _REG_QDR = 0xBB00;
 
 _REG_QDR = 0x0820;
 _REG_QDR = 0x0800;
 
 _REG_QDR = 0x0A00;
 _REG_QDR = 0x8776;
 
 _REG_QDR = 0x80A0;
 _REG_QDR = 0x0000;
 //Set up Transfer
 _REG_QWR = 0x0700; //0000 0101 0000 0000
 //Begin the Transfer
 _REG_QDLYR |= 0x8000;
 //Wait for finish
 while ( !(_REG_QIR & BIT(0) ) );
 
_REG_QAR = QSPI_RxD_RAM;
Batt1 = _REG_QDR;
 //Turn off GPIO21 and 22 for QSPI CS 2 and 3
 SetGPIOOutput (OUTPUT_QSPI_CS2, INACTIVE);
 SetGPIOOutput (OUTPUT_QSPI_CS3, INACTIVE);
 
 
Thanks for any comments.
 
Mike

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