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GPCLR_WR does not work???

Question asked by Pietro di Castri on Jan 26, 2015
Latest reply on Jan 28, 2015 by Pietro di Castri

Good morning.

I am trying to use the  HW_PORT_GPCLR_WR without success.

In this stub of code the kGpioEncMux2 kGpioEncMux1 kGpioEncMux0 are the bit 9 8 7 of the PORTC.

The GPIO_HAL_WritePinOutput  works, but if I try to use the HW_PORT_GPCLR_WR it does not...

The bit of the register appear to be correct, but the output is different.

Suggestions???

 

typedef union _mux_bits_t

{

  struct

  {

       uint32_t sp : 7;

       uint32_t mux : 3;

       uint32_t sp2 : 22;

  };

  struct

  {

       uint32_t sp3 : 23;

       uint32_t muxact : 3;

       uint32_t sp4 : 6;

  };

  uint32_t val;

} avago_mux_bits_t;

 

 

avago_mux_bits_t mux_bits = { 0 };

 

 

 

 

void inline static avago_mux_out( uint8_t muxval )

{

  muxval ^= 0xFF; // just negate for the ULN open collector

 

  mux_bits.mux = muxval;

  mux_bits.muxact = 7;

  HW_PORT_GPCLR_WR( g_portBaseAddr[ GPIO_EXTRACT_PORT(kGpioEncMux2) ], mux_bits.val );

 

  GPIO_HAL_WritePinOutput( g_gpioBaseAddr[ GPIO_EXTRACT_PORT( kGpioEncMux2 ) ], GPIO_EXTRACT_PIN( kGpioEncMux2 ), muxval & 4 );

  GPIO_HAL_WritePinOutput( g_gpioBaseAddr[ GPIO_EXTRACT_PORT( kGpioEncMux1 ) ], GPIO_EXTRACT_PIN( kGpioEncMux1 ), muxval & 2 );

  GPIO_HAL_WritePinOutput( g_gpioBaseAddr[ GPIO_EXTRACT_PORT( kGpioEncMux0 ) ], GPIO_EXTRACT_PIN( kGpioEncMux0 ), muxval & 1 );

}

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