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iMX6 Solo DDR3 byte address troubleshoot

Question asked by andreas karlsson on Jan 12, 2015
Latest reply on Jan 16, 2015 by andreas karlsson

Hi,

 

I've a question regarding an iMX6Solo issue, we've used the DDR3 Script Aid XLS to create a basic configuration(no stress test calibration run). We've used the result and converted to Lauterbach CMM syntax, so far so good. But when the iMX is reset and started with the resulting values we get a weird phenomenon, Byte[1] gets written at address +8 for some reason.

 

Example

 

Data.Set 0x10000000 %Long 0xFFFFFFFF results in ,

0x10000000 = 0xFF00FFFF

<snippet>

0x10000008 = 0x00FF0000

 

The DDR3 is connected:

CPU                                Micron2Gb         Micron2Gb

A[0:15]  <->                     A[0:15]<->      A[0:15]

D[0-7 swapped] <->          D[0-7]

D[8-15 swapped]<->         D[8-15]

D[16-23 swapped]<->                             D[0-7]

D[24-31swapped]<->                             D[8-15]

 

However we didn't connect the byte(s) low bits,so write levelling will not function, but I would expect the DDR3 Script Aid XLS to generate a valid configuration regardless if write levelling can be used or not?

 

Attached is the Script Aid input.

 

regards

Andreas

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