Could you please provide the Read calibration for MCIMX6Q6AVT10AD's DDR3 Read cycle to derive setup and hold time
The legend refers to the DDR need to be calibrated. That is to say that the setup and hold values shown are attained only after the DDR memory is calibrated. You would need to perform calibration for your design (specific layout and memory used) as mentioned on AN4467: i.MX 6 Series DDR Calibration (link below). I would recommend you taking a look at this document.
Retrieving data ...