Setting sysclk of the SSI's to 12.288MHz

[scrapper]

Hello,

I am using the three SSI's on the imx6 as ALSA sound cards. When configuring the sysclk of the SSI's, I am seeing that the 12288000 value that I give to clk_round_rate is rounded to a lower value. So the resulting sysclk value cannot be used to obtain a 48KHz sampling rate. I have debugged this and found out that the following line in arch/arm/mach-imx/clk-imx6q.c sets a PLL4 clock value that is not suitable for obtaining the sampling rate I want:

/* Set pll4_audio to a value that can derive 5K-88.2KHz and 8K-96KHz */

imx_clk_set_rate(clk[pll4_audio_div], 541900800);

I have changed the 541900800 Hz value to 688128000 Hz and after that, I am able to obtain exactly 12.288MHz.

Is there another (probably the proper) way to obtain exactly 12.288 MHz without changing the imx6 clock driver source code? I think there must be, because the comment above that line says that this value will allow obtaining 12.288MHz :smileyhappy:

[SergioSolis · Accepted solution]

Unfrotunately the only way to obtain the 12.288 mhz is by modifying the PLL's.  I would recommend to only modify the PLL associated to the SSI though you won't get the exact value you are looking for.

Best regards,
Sergio

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