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data from uart is coming in parts, and not as complete buffer

Question asked by neeraj sharma on Jan 8, 2015
Latest reply on Jan 13, 2015 by neeraj sharma

Hi, i am using ti wl1273 chip on uart with freescale imx6 based board. When waiting to recieve version info from chip, the data is recieved in parts and hence the ti driver logic fails.

 

Any suggestions what could be the problem..?

 

Log:

 

[ 53.791790] (stk) : st_kim_start

[ 53.909975] (stk) :ldisc_install = 1

[ 53.915072] (stc): st_tty_open

[ 53.918518] (stk) :line discipline installed

[ 53.922760] <out<01 01 10 00

[ 53.926859] >in>04

[ 53.929021] >in>0e 0c 01 01 10 00 06 00 00 06 0d 00 0f 1f

 

Here dat being recieved comes in parts 04 and then the remaining part. This is causing problems.

 

I am using uart5 with ctsrts and sdma.

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