i have two queries...
1) I would like to confirm my understanding on below mention TIP, The Clock Trace Length should be set up such that the clock signal reaches Ethernet PHY and Processor at the same Time. it means for example the Trace length between Crystal and Processor is 2cm and other end from same crystal to Ethernet should be 2cm is i understood Right? Please assist me?
Keep in mind that if RMII is being used the EXTAL0 input must be 50 MHz and the clock trace length
should be setup so that the clock reaches the Ethernet PHY and processor at the same time. Skew
between the two clocks could result in timing violations on the RMII signals.
2)How to implement Hardware Watchdog Timer in K70 processor?Please assist..