Dear Sir or Madam,
Refer to "18.3 CCM Clock Tree" in IMX6DQRM_Rev.2.
There is below description.
"The default frequency values (in MHz) for the PLLs and PFDs is the maximum allowed frequency. The PLL and PFD control registers should not be programmed to exceed these values."
Next, refer to "Table 18-4. System Clock Frequency Values".
ARM_CLK_ROOT Default Frequency was 792MHz.
freescale has i.MX6DQ product for automotive with 1 GHz grade.
What description is right?
Please give me the correct CCM tree.
(If the RM was typo, please fix these description)