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Hibernation on kernel 3.10.17 on IMX6

Question asked by Luigi Fioretti on Jan 5, 2015
Latest reply on Nov 18, 2016 by John Smith

I had apply this patch :

http://lists.infradead.org/pipermail/linux-arm-kernel/2010-December/036055.html

You can read the first problems here:

http://lists.linaro.org/pipermail/linaro-kernel/2014-March/012635.html

 

I had found a solution to this problem:

in file arch/arm/kernel/hibernate.c

You need to change in this mode:

/* Used in hibernate_asm.S */

#define USER_CONTEXT_SIZE (15 * sizeof(u32))

unsigned long saved_spsr_svc;

unsigned long saved_context_r14_svc;

unsigned long saved_context_r13_svc;

unsigned long saved_cpsr;

unsigned long saved_context_r0[USER_CONTEXT_SIZE];

 

static struct saved_context saved_context;

 

/* References to section boundaries */

extern const void __nosave_begin, __nosave_end;

 

the sequence is VERY IMPORTAN because in assemble file ( arch/arm/kernel/hibernate_asm.S)

load the R13 and R14 register in sequence.

 

 

==================================================================

Now I have this problems:

When resume  and run this function

+ENTRY(swsusp_arch_resume)

+    /*

+     * Restore_pblist is the starting point for loaded pages

+     */

+    ldr     r0, .Lrestore_pblist

+    ldr     r6, [r0]

+

+.Lcopy_loop:

+    ldr     r4, [r6]     /* src IOW present address */

+    ldr     r5, [r6, #4] /* dst IOW original address*/

+    mov     r9, #1024    /* No. of entries in one page, where each entry is 4 bytes */

+

+.Lcopy_one_page:

+    /*

+     * This loop could be optimized by using stm and ldm.

+     */

+    ldr     r8, [r4], #4

+    str     r8, [r5], #4

+    subs    r9, r9, #1

+    bne     .Lcopy_one_page

+

+    /* The last field of struct pbe is a pointer to the next pbe structure */

+    ldr     r6, [r6, #8]

+    cmp     r6, #0

+    bne     .Lcopy_loop

+

+    /*

+     * Restore SVC context

+     */

+    ldr     r3, .Lsaved_context_r13_svc

+    ldmia   r3, {r13-r14}

+    ldr     r3, .Lsaved_spsr_svc

+    ldr     r1, [r3]

+    msr     spsr_cxsf, r1

+

+    mrs     r0, cpsr    /* Save current mode into r0 */

+

+    /*

+     * Change to system(user) mode

+     */

+    mov     r1, r0

+    orr     r1, r1, #0x1f

+    msr     cpsr_c, r1

+

+    /*

+     * Restore User context

+     */

+    ldr     r3, .Lsaved_context_r0

+    ldmia   r3, {r0-r14}

+    ldr     r3, .Lsaved_cpsr

+    ldr     r1, [r3]

+    msr     cpsr_cxsf, r1

+

+    msr     cpsr_c, r0    /* Restore original mode from r0 */

+

+    /*

+     * Flush TLB (Invalidate unified TLB unlocked entries)

+     */

+    mov     r1, #0

+    mcr     p15, 0, r1, c8, c7, 0

+

+    /* Set the return value */

+    mov    r0, #0

+

+    /* Restore return address */

+    ldr     r3, .Lsaved_context_r14_svc

+    ldr     lr, [r3]

+    mov     pc, lr

+ENDPROC(swsusp_arch_resume)

 

After about 700/800 loop the function stop to work in BOLD istruction.

 

Have you idea for solution?

 

Thanks

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