We are using the LVDS to output SD/HD video from the SoC. Due to constraints in the display side, I would like to check if the IPU can be configured to output video according to both pixel-clock and Vsync from external source (i.e. gen-lock) .
Does the i.MX6 support video output per Vsync from external source ? if positive, I'll appreceiate any guidance regarding the steps needed to set such a configuration.