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TWRVF65GS10:I2S slave mode configuration issue

Question asked by manjug on Dec 25, 2014
Latest reply on Jan 6, 2015 by alejandrolozano

Hi,

I'm configuring I2S as receive slave for receiving audio from source which provides Bitclock ,Wordsync and raw audio. I'm using DMA based data transfer.Using MQX RTOS.

Below is my configuration code:

_mqx_int init_I2S()

{

    _mqx_int  errcode = 0;

    _mqx_int    param = 0;// temp;

    char* modeString = NULL;

    MQX_FILE_PTR i2s_ptr = NULL;

     _mqx_uint type=IO_IOCTL_I2S_SET_MODE_SLAVE;

    uint8_t mode = (I2S_RX_MASTER | I2S_RX_SLAVE);

    I2S_STATISTICS_STRUCT stats;

    AUDIO_DATA_FORMAT audio_format;

    audio_format.ENDIAN = AUDIO_LITTLE_ENDIAN;

    audio_format.ALIGNMENT = AUDIO_ALIGNMENT_LEFT;

    audio_format.BITS = 32;

    audio_format.SIZE = 1;

    audio_format.CHANNELS = 2;

 

      if ((i2s_ptr = fopen("sai:", NULL)) == NULL)

    {

        printf("  Error: Unable to open a device \n");

        return ;

    }

   

    printf("I2S Open Success\n");

    result = ioctl(i2s_ptr, type, &mode);

    if(result==I2S_OK)

    {

     printf("Mode Success\n");

    }

    else

    {

     printf("Mode Error = %02x\n",result);

    }

 

    if (ioctl(i2s_ptr, IO_IOCTL_AUDIO_SET_IO_DATA_FORMAT, &audio_format) != I2S_OK)

    {

        printf("  Error: Input data format not supported.\n");

        fclose(i2s_ptr);

    }

    }

 

 

I'm using PTB0(SAI2_RX_BCLK),PTB1(SAI2_RX_DATA), and PTB2(SAI2_RX_SYNC).J8 header pin 38,39 and 40.

Below is the init_gpio.c code :

_mqx_int _bsp_sai_io_init

(

    _mqx_uint dev_num

)

{

    switch(dev_num)

    {

        case 0: // SAI0

            CCM_CSCMR1 = (CCM_CSCMR1 & ~CCM_CSCMR1_SAI0_CLK_SEL_MASK) | CCM_CSCMR1_SAI0_CLK_SEL(3);

            CCM_CSCDR1 = (CCM_CSCMR1 & ~CCM_CSCDR1_SAI0_DIV_MASK) | CCM_CSCDR1_SAI0_DIV(0x0f);

            CCM_CSCDR1 |= CCM_CSCDR1_SAI0_EN_MASK;

 

 

            // RX_BCLK

            //IOMUXC_SW_MUX_CTL_PAD_PAD_11 = IOMUXC_SW_MUX_CTL_PAD_PAD_MUX_MODE(5) | IOMUXC_SW_MUX_CTL_PAD_PAD_IBE_MASK;

 

 

            // RX_DATA

            //IOMUXC_SW_MUX_CTL_PAD_PAD_12 = IOMUXC_SW_MUX_CTL_PAD_PAD_MUX_MODE(5) | IOMUXC_SW_MUX_CTL_PAD_PAD_IBE_MASK;

 

 

            // RX_SYNC

            //IOMUXC_SW_MUX_CTL_PAD_PAD_13 = IOMUXC_SW_MUX_CTL_PAD_PAD_MUX_MODE(5) | IOMUXC_SW_MUX_CTL_PAD_PAD_IBE_MASK;

 

 

            // TX_SYNC

            IOMUXC_RGPIO(98) = IOMUXC_SW_MUX_CTL_PAD_PAD_MUX_MODE(1) | IOMUXC_SW_MUX_CTL_PAD_PAD_DSE(7) |

                IOMUXC_SW_MUX_CTL_PAD_PAD_PUS(1) | IOMUXC_SW_MUX_CTL_PAD_PAD_PKE_MASK | IOMUXC_SW_MUX_CTL_PAD_PAD_PUE_MASK | IOMUXC_SW_MUX_CTL_PAD_PAD_OBE_MASK;

 

 

            // TX_DATA

            IOMUXC_RGPIO(96) = IOMUXC_SW_MUX_CTL_PAD_PAD_MUX_MODE(1) | IOMUXC_SW_MUX_CTL_PAD_PAD_DSE(7) |

                IOMUXC_SW_MUX_CTL_PAD_PAD_PUS(1) | IOMUXC_SW_MUX_CTL_PAD_PAD_PKE_MASK | IOMUXC_SW_MUX_CTL_PAD_PAD_PUE_MASK | IOMUXC_SW_MUX_CTL_PAD_PAD_OBE_MASK;

 

 

            // TX_BCLK

            IOMUXC_RGPIO(93) = IOMUXC_SW_MUX_CTL_PAD_PAD_MUX_MODE(1) | IOMUXC_SW_MUX_CTL_PAD_PAD_DSE(7) | \

                IOMUXC_SW_MUX_CTL_PAD_PAD_PUS(1) | IOMUXC_SW_MUX_CTL_PAD_PAD_PKE_MASK | IOMUXC_SW_MUX_CTL_PAD_PAD_PUE_MASK | IOMUXC_SW_MUX_CTL_PAD_PAD_OBE_MASK;

 

 

            break;

        case 2:

            // RX_DATA PTB1

            IOMUXC_RGPIO(23) = IOMUXC_SW_MUX_CTL_PAD_PAD_MUX_MODE(5) | IOMUXC_SW_MUX_CTL_PAD_PAD_IBE_MASK;

            /*Daisy chain Selecting Pad: PTB1 for Mode: ALT5 (SAI2_RX_DATA)*/

            IOMUXC_SAI2_IPP_IND_SAI_RXDATA_0_SELECT_INPUT = 0x01;

// SAI2_RX_BCLK PTB0

  IOMUXC_RGPIO(22) = IOMUXC_SW_MUX_CTL_PAD_PAD_MUX_MODE(5) | IOMUXC_SW_MUX_CTL_PAD_PAD_IBE_MASK;

  /*Daisy chain Selecting Pad: PTB0 for Mode: ALT5 (SAI2_RX_BCLK)*/

  IOMUXC_SAI2_IPP_IND_SAI_RXBCLK_SELECT_INPUT = 0x01;

  // SAI2_RX_SYNC PTB2

  IOMUXC_RGPIO(24) = IOMUXC_SW_MUX_CTL_PAD_PAD_MUX_MODE(5) | IOMUXC_SW_MUX_CTL_PAD_PAD_IBE_MASK;

  /*Daisy chain Selecting Pad: PTB2 for Mode: ALT5 (SAI2_RX_SYNC)*/

  IOMUXC_SAI2_IPP_IND_SAI_RXSYNC_SELECT_INPUT = 0x01;

 

            // RX_DATA

            IOMUXC_RGPIO(23) = IOMUXC_SW_MUX_CTL_PAD_PAD_MUX_MODE(5) | IOMUXC_SW_MUX_CTL_PAD_PAD_IBE_MASK;

           /*Daisy chain Selecting Pad: PTB1 for Mode: ALT5 (SAI2_RX_DATA)*/

            IOMUXC_SAI2_IPP_IND_SAI_RXDATA_0_SELECT_INPUT = 0x01;

            // RX_SYNC

            IOMUXC_RGPIO(13) = IOMUXC_SW_MUX_CTL_PAD_PAD_MUX_MODE(5) | IOMUXC_SW_MUX_CTL_PAD_PAD_IBE_MASK;

            break;

        default:

            break;

    }

 

 

    return MQX_OK;

}

 

When i start receving using DMA mode it hangs at   ioctl(i2s_ptr, IO_IOCTL_I2S_WAIT_RX_EVENT, NULL);

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