AnsweredAssumed Answered

K60FN1M TWR - ;Demo Lab' hangs in mcg.c

Question asked by richard lowes on Dec 23, 2014
Latest reply on Jan 20, 2015 by rickli

Hangs up here:

  while (MCG_S & MCG_S_IREFST_MASK){}; // wait for Reference clock Status bit to clear

 

Tried all J9/J6 combinations, still halts there.

 

I am reasonably sure, this being only my second board from Freescale Kinetis Tower series, that I am NOT THE ONLY ONE

this has happened to, and that Freescale is aware, has a solution etc etc etc.

 

While I see the humour in this, the management here fails to see the funny side of two 'Highly integrated'  'Out of the Box' functional

kits to 'speed our time to market' that prove to be bug ridden disasters.

 

I would have thought the safest way forward would be to use the on board xtal etc - not so!

 

calling info

#define K60_CLK         1
#define REF_CLK         XTAL8   /* value isn't used, but we still need something defined */
#define CORE_CLK_MHZ    PLL96  /* 96MHz is only freq tested for a clock input*/

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