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MMPF0100 : Is the the SWxx_PWRSTG[2:0] setting related with the ISW1ABCLIM value ?

Question asked by koichi sakagami on Dec 21, 2014
Latest reply on Dec 21, 2014 by igorpadykov

Dear community,


We consider the MMPF0100 register setting .


The SWxx_PWRSTG[2:0] bit control the number of power stage.
Meantime, SW1A/B/C has the parameter ( ISW1ABCLIM ) "Current Limiter Peak Current Detection"


Is the SWxx_PWRSTG[2:0] bit register setting related with the ISW1ABCLIM value ?
For example, the SWxx_PWRSTG[2:0] is set to "001" (about half power),
then Does ISW1ABCLIM value decrease ?


Best Regards,
Koichi Sakagami