Dear Sir or madam,
Hello. I have a question about the layout of address and command signal in i.MX6 SABRE-AI.
Refer to "Table 3-3. DDR3 routing by byte group" in IMX6DQ6SDLHDG(Rev.1).
There were below descriptions.
Min : Clock (min) – 200
Max : Clock (min)
Recommendations : Match the signals ± 25 mils.
But, my customer measured the some address and command length on i.MX6 SABRE-AI.
These length didn't match the signals "± 25 mils".
Could you tell me the meaning of guide line?
"Match the signals ± 25 mils" means for all the signals of address and command?
"Match the signals ± 25 mils" means the matching four branched signals from output of single signal of i.MX6?