I am trying to use the free running counter component, but I can't get it working right. I am trying to get an interrupt every 1 msec. The component sets to counter for a 3.277 msec. period and sets the compare register to 0x4e1b. it takes the counter 1 msec. to go from 0 to 0x4e1b, but nothing changes the compare register, So I get a compare interrupt when the counter equals 0x4e1b, which is every 3.277 msec, the same as the overflow period. Is anybody else having this problem?