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Reset PLL2 and PLL3

Question asked by Christian Bach on Dec 15, 2014
Latest reply on Dec 16, 2014 by Christian Bach

CPU boots from DDR Ram and i try to reset PLL2 and PLL3 with the following steps:


1. store clock registers

2. remap PLL2 clocks to PLL3

3. power down PLL2

4. reintialize PLL2 with PFDs

5. remap PLL3 clocks to PLL2

6. power down PLL3

7. reintialize PLL2 with PFDs

8. restore clock registers


At Step 1 when i switch CBCDR[periph_clk_sel] from PLL2 (528Mhz) to PLL3 (480) Mhz, the system crashes. What can i do to switch AHB and MMDC_CH0 to PLL3?