I'm trying to read the status reg (SR) of the DSP56800E "8365" device but I always read I1 & I0 as 1 (intr masked). I have a routine that operates on shared memory so I want to disable intr only if they are not already disabled by the calling function. If I read the SR into Y0 reg, it always shows intr masked even after I explicitly execute a "bfclr #0x0300,SR" asm insn. I've also looked at the SR reg that is stacked upon a function call and see the same thing.
The spec says those I1 & I0 bits are R/W and it doesn't show that should always read 1, so what am I doing wrong?