I use my custom board to run ddr stress test v1.0.3, The DDR3 is H5TQ2G63BFR, tRCD=tRP=CL (ns) = 15, tRC = 52.5, tRAS = 37.5, When the CPU is MX6Q, everything is fine. When I test other board which the CPU is MCIMX6U5DVM10AB, the WL is larger than 0x2F:
Would you like to run the write leveling calibration? (y/n)
Please enter the MR1 value on the initilization script
This will be re-programmed into MR1 after write leveling calibration
Enter as a 4-digit HEX value, example 0004, then hit enter
0004 You have entered: 0x0004
Start write leveling calibration
Write leveling calibration completed
MMDC_MPWLDECTRL0 ch0 after write level cal: 0x004A004D
MMDC_MPWLDECTRL1 ch0 after write level cal: 0x003F0043
MMDC_MPWLDECTRL0 ch1 after write level cal: 0x001F0025
MMDC_MPWLDECTRL1 ch1 after write level cal: 0x0022003B
I'm sure WALAT bit of MMDCx_MDMISC is 1(0x021b0018 = 0x00011740) , The i.MX6_DDR_Stress_Test_User_Guide.pdf said
"If write-leveling delay is larger than 0x2f, it is suggested to
set the WALAT value on MMDCx_MDMISC register to 1 in
the initialization script and re-run the DDR_Stress_Tester".
Hower, the stress test can passed.
WL is larger than 0x2F , I Can't make WL smaller than 0x2F. Can it cause any problem with MX6DL?
Original Attachment has been moved to: ddr_stress_test_for_dl.txt.zip
Original Attachment has been moved to: test.inc.txt.zip