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i.MX6DL:Inbound address setting behavior (PCIE_PL_iATUVR)

Question asked by koichi sakagami on Dec 10, 2014
Latest reply on Dec 17, 2014 by Yuri Muhin

Dear community,

 

We have been developing their product with iMX6DualLite.
We make the device driver for PCIexpress.

 

In the case of setting to the PCIE_PL_iATURLBA register for Inbound iATU address value,
we execute the following sequence.

 

  1.set to the Viewport Register (PCIE_PL_iATUVR).
  2.set to the iATU Region Lower Base Address Register(PCIE_PL_iATURLBA) .
  3.set to the Viewport Register (PCIE_PL_iATUVR) another value.

 

It is the "No3" timing that the address setting written in (PCIE_PL_iATURLBA)
is reflected by actual behavior.
It is NOT "No2" timing.

 

[Question]
Is above behavior the iATU specification ?

 

Meantime,
in the case of setting to the PCIE_PL_iATURLBA register for "Outbound" iATU address value,
it is the "No2" timing that the address setting written in (PCIE_PL_iATURLBA)
is reflected by actual behavior.

 

Best Regards,
Koichi Sakagami

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