Our customer want to use the second camera using IPU2-CSI1 parallel interface.
IPU2-CSI1 pin allocation may be following.
MX6Q_PAD_EIM_A17 <= IPU2_CSI1_D_12,
MX6Q_PAD_EIM_A18 <= IPU2_CSI1_D_13,
MX6Q_PAD_EIM_A19 <= IPU2_CSI1_D_14,
MX6Q_PAD_EIM_A20 <= IPU2_CSI1_D_15,
MX6Q_PAD_EIM_D19 <= IPU2_CSI1_D_16,
MX6Q_PAD_EIM_A22 <= IPU2_CSI1_D_17,
MX6Q_PAD_EIM_A23 <= IPU2_CSI1_D_18,
MX6Q_PAD_EIM_A24 <= IPU2_CSI1_D_19,
According to i.MX6dq data sheet, after out of reset, these pins become the output port and out low level signal.
Therefore, after reset, Do we must not tie a signal of the CMOS camera to EIM_A[17:24] until MUX_MODE is changed ?