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CCSRBAR after reset don't have default value

Question asked by Rafael Coelho on Dec 1, 2014
Latest reply on Dec 8, 2014 by Rafael Coelho



We are designing a target board using p3041 CPU referring to the design of P3041DS-PC. But we have a little problem with CCSRBARH register after perform the core reset, the value is set to 0xF, so the P3041DS_init_sram.tcl cannot map entry for flash memory. We are using RCW Harded-Coded 1_0010 (16-bit NOR Flash...).

What would be the reason that this register is not set to its default value (0x0) after reset?

Thanks for any response.

Best regards.