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i.MX6 EIM burst access and WC bit setting.

Question asked by Satoshi Shimoda on Nov 27, 2014
Latest reply on Mar 25, 2015 by Artur Petukhov

Hi community,

 

Our partner have a question about i.MX6SDL EIM.

Please see chapter 22.9.1 in IMC6SDLRM (Rev.1).

I want to know what is different between the following two cases.

 

[Case 1]

WC: 0 (Write access burst length occurs according to BL value)

BL: 100 (Continuous burst length)

SWR: 1 (write accesses are in Synchronous mode)

 

[Case 2]

WC: 1 (Write access burst length is continuous)

SWR: 1 (write accesses are in Synchronous mode)

 

Would you let me know what is different and what defines the burst length in each case?

 

 

Best Regards,

Satoshi Shimoda

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