Dear Sir or Madam,
I have question about freescale's recommendation about distance of DDR3 signal lines in i.MX6.
Refer to "Table 3-1. Stackup implementation" in Hardware Development Guide for i.MX6DQ6SDL, Rev. 1.
Trace width is 4.7[Mils] with Single ended.
Generally, distance of DDR3 signal lines are recommended twice of length of the Trace width.
But, the distance of signal lines of SABRE-AI were about 4.0 [Mils].
It is very narrow.
Could you tell me the recommendation about distance of signal lines?
Or, please give me your advice.