Distance of DDR3 signal lines in i.MX6.

[keitanagashima]

Dear Sir or Madam,

Hello.

I have question about freescale's recommendation about distance of DDR3 signal lines in i.MX6.

Refer to "Table 3-1. Stackup implementation" in Hardware Development Guide for i.MX6DQ6SDL, Rev. 1.

Trace width is 4.7[Mils] with Single ended.

Generally, distance of DDR3 signal lines are recommended twice of length of the Trace width.

But, the distance of signal lines of SABRE-AI were about 4.0 [Mils].

It is very narrow.

[Question]

Could you tell me the recommendation about distance of signal lines?

Or, please give me your advice.

Best Regards,

Keita

[art · Accepted solution]

The restriction of DDR3 signal traces spacing of 2x of traces width is important on a long (longer than approx 3.5 inches) DDR3 buses that cause a high signal crosstalk between adjacent traces. In case of relatively short DDR3 bus (1 - 2 inch), as on the i.MX6 SABRE SD or i.MX6 SABRE AI boards, this restriction is much less significant and may not be followed. So, the DDR3 signal traces spacing of 4 - 5 mils is pretty acceptable in that case.

Have a great day,
Artur

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