we have a 1 MB of external SRAM organized as 512K * 16 bit that is connected to K20 MCU flexbus. Read from SRAM is always 16 bit (both bytes) but we DO NOT have FB_AD0 pin connected to SRAM address line 0. So only even addresses should be accessed.
We want to have another MQX memory pool in order to store larger amount of data (various data structures). I've sccessfuly created new memory pool and allocated space from it, just as it is described here: https://community.freescale.com/message/329322#329322
We are having an issue with byte access to external SRAM e.g. when writing values to byte array. In this case, writing to odd addresses overwrites values in even addresses. Writing word and integer values aren't problematic. How should i employ aligned SRAM access? Is there a way to modify linker script (we are using GCC)?