igorpadykov

Re: UART condition at mem mode on I.MX28

Discussion created by igorpadykov Employee on Nov 11, 2014
Latest reply on Dec 29, 2014 by igorpadykov
Branched from an earlier discussion

Hi Sung-Uk

 

from sect. 9.2 Operation MCIMX28RM

 

Each individual digital pin supporting the GPIO operation may be dynamically programmed

at any time to be in one of the following states:

• High-impedance (for input, three-state, or open-drain applications)

 

sect.9.4.53 PINCTRL Bank 0 Data Output Enable Register

 

For pins in bank 0 that are configured as GPIOs, a 1 in this register will enable the

corresponding bit value from HW_PINCTRL_DOUTxx register to be driven out the pin,

and a 0 in this register will disable the corresponding driver.

 

Best regards

igor

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