Dear Sir or Madam,
I have a question about Vtt termination in i.MX6SDL.
Refer to "3.5.5 4-Gigabyte recommendations" and "Figure 3-12. ADDR/CMD signal topology" in IMX6DQ6SDLHDG(Rev.1).
Tehere is description of "This option has eight DDR3 memories and requires the addition of a termination resistor."
Is VTT termination necessary to four DDR3 memories, too?
If one change from i.MX6DL to i.MX6Q (i.e. DDR clock 400MHz to 528MHz), is VTT termination necessary to four DDR3 memories, too?
Refer to "Figure 3-13. CTRL signal topology".
Is this figure at the eight DDR3 memories?
Is VTT termination necessary to four memories, too?