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adv7181 on i.mx6 and Data_EN question

Question asked by zhou wei on Nov 10, 2014
Latest reply on Nov 27, 2014 by Florian PANTALEAO

Hello,

     I am using adv7181 to convert RGB signal ,but facing some problem.  I use adv7181 to convert 800*600 rgb signal to 4:2:2 Ycbcr signal. I'm sure adv7181 is correctly configured because i have used an oscilloscope to measure output of adv7181, signals like hsync/vsync/data_en are all right.

     I config CSI0 work in gated clock mode. Cause imx6q request Hsync to be high when line data is valid, i connect Data_EN signal(output from ADV7181)  to CSI0's Hsync pin, and just leave CSI0's data_en pin dangling.

11111.bmp

    



First problem:

imx6q caputure all data including vaild data when Hsync is hign and the invaild data when Hsync is low. i check all register but can not find any mistake. Here is the register:

     IPU_CONF:                     0X00000760

     CSI0_SENS_CONF:          0X0400CA00

     CSI0_SENS_FRM_SIZE:   0X0257031F

     CSI0_ACT_FRM_SIZE:      0X0257031F

     CSI0_OUT_FRM_CTRL:     0X00000000

     CSI0_TST_CTRL:              0X00000000          

     CSI0_CCIR_CODE_1:       0X00000000

     CSI0_CCIR_CODE_2:       0X00000000

     CSI0_CCIR_CODE_3:       0X00000000

     CSI0_DI:                          0XFFFFFFFF

     CSI0-SKIP:                      0X00000000

     CSIO_CPD_CTRL:           0X00000000

 

 

Second problem:

Since imx6q caputure all data including vaild data and invaild data. I programme to choose the vaild data and find that imx6q does not capture valid data in correct timing.Here is the image that imx6q captured:

22222.bmp

while the input image is like this:

testforvga7.bmp

        

Besides,i am really confuse about date_en, the datasheet does not mention how should the waveform of data_en should be. But if i invert the data_en signal ,the imx6q would not capture any data.

 

 

Any help would be greatly appreciated.

Thanks,

zhou

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