imx6S automotive -PCIe Compliance as EP- Settings/Voltages

[robo]

Hello community,

regarding to the AN4784 (http://cache.freescale.com/files/32bit/doc/app_note/AN4784.pdf) you have a "Maximum transition eye voltage: 0.376 volts". The boundary values to pass this testcase are ''257.000 mV < x < 600.000 mV".

I have a couple of questions, pls feel free to answer them:

1. Did you use the half swing option of the transmit margin (PCIE_RC_LCSR2) ?
2. How can you reach approx +0.4V/-0.4V ?
3. How does the Supply of the PCIe_VPTX voltage look like?
4. Did you supply the the PCIe Phy from the internal regulators of the imx6S (VDD_SOC)? 
5. Have you used a imx6S with 800MHz PLL (ARM_Clock)?
6. Does you fullfill the compliance test, if a 1GHz version of the imx6s would be used?

Regards

[igorpadykov]

Hi ro

I would suggest to ask local FAE provide PCIe report for you from

internal link

iMX6DL PCIe compliance test report

Best regards

igor

[robo]

Hi igorpadykov,

basicay after a lot of reading I can answer all questions by my self.

But nevertheless, the VDD_SoC Voltage depends on the ARM PLL clock. If the PCIe Phy is supplied from the VDD_SoC voltage (imx6S LDO) I have to change the values on the IOMUXC_GPR8 register.

What is the expected voltage drop between the settings in IOMUXC_GPR8 (PCS_TX_SWING_FULL) register and the expected voltage value at the imx6 ball?

regards

[igorpadykov]

Hi ro

VDD_SoC Voltage does not depend on the ARM PLL clock, it may

depend on VPU frequency. Please check Table 9. Operating Ranges

IMX6SDLCEC

Reagrding "expected voltage drop between the settings" I am not

sure if that was measured/characterized.

~igor