SPI slave receive long frames

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SPI slave receive long frames

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Bogumil
Contributor III

Hi, we wan't to receive longer frames via SPI slave, 16-32 bytes, without CS change.

How this can be done?

According to our tests:

- SPI interrupts are generated after CS goes inactive, means RX FIFO (4 bytes) override or lost some bytes,

- polling status works the same, flags are only set after CS goes inactive,

- disabling CS pin function disables receiving completely, no interrupts are generated and no status flags are set.

We are using MK10DX128VLH7 and SPI0, Kinetis Design Studio with processor expert.

We didn't succeed with setting DMA for receiving yet, but probably works the same?

BTW, documentation is not clear whether this chip has one or two SPI modules, e.g. no SPI1_SCK pin in reference manual rev.1.1 Dec 2012.

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Bogumil
Contributor III

Hi Jingjing Zhou

Thanks for answer. We already found a reason.

We use the same external SPI master to communicate with Kinetis slave on SPI0 and for uploading firmware with EZPort - which is also SPI but uses different pins.

That's why we had both chip selects shorted outside the board, but EXPort CS is also a NMI pin. This causes NMI interrupt to be triggered every time SPI0 CS goes low.

Unluckily, NMI pin is enabled by default and this interrupt was correctly handled by default handler. When we disabled NMI pin function, everything start working as

expected, we get SPI int after each received byte.

BTW

1) continuous selection is only for master, right? And we use only slave in Kinetis.

2) Ok. So it seems only reference manual shows some SPI1 pins, which are not available in this chip.

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Bogumi P,

    1: About your first question, according to chapter 43 in our reference manual K10P64M72SF1RM:

  Programmable serial frame size of 4–16 bits, expandable by software control

• SPI frames longer than 16 bits can be supported using the continuous selection format

  You can try to use the continuous selection format, about the details, please refer to 43.4.4.3 Continuous Selection Format.

  2: MK10DX128VLH7 have just 1 SPI modules, you can find this in the datasheet of MK10DX128VLH7.

    Actually, when you create a new project in the PE, and choose the SPI components, you will find there only  SPI0 to choose.

Wish it helps you!

Have a great day,
Jingjing

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Bogumil
Contributor III

Hi Jingjing Zhou

Thanks for answer. We already found a reason.

We use the same external SPI master to communicate with Kinetis slave on SPI0 and for uploading firmware with EZPort - which is also SPI but uses different pins.

That's why we had both chip selects shorted outside the board, but EXPort CS is also a NMI pin. This causes NMI interrupt to be triggered every time SPI0 CS goes low.

Unluckily, NMI pin is enabled by default and this interrupt was correctly handled by default handler. When we disabled NMI pin function, everything start working as

expected, we get SPI int after each received byte.

BTW

1) continuous selection is only for master, right? And we use only slave in Kinetis.

2) Ok. So it seems only reference manual shows some SPI1 pins, which are not available in this chip.

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Bogumi P,

    Glad to hear your problem is solved!

    NMI pin is really enabled by default, you should disable it from the flash configruation field, otherwise, this pin will still the NMI function instead of the SPI CS funtion.

    (1) Yes, the contiunous selection should be select from the master.

    (2) About the module numbers, you should combine the datasheet to check it, because some reference manual describ the SPI is for the whole kinetis K10 series, maybe not correct to the specific K10.

    

Jingjing

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