AnsweredAssumed Answered

Recommended topology when 2 chips DDR3 are connected to i.MX6.

Question asked by Satoshi Shimoda on Oct 14, 2014
Latest reply on Oct 14, 2014 by Aven Tsao

Hi community,

 

Our partner have a question about i.MX6 series DDR3 connection.

They want to know the recommended topology when two chips DDR3 are connected to i.MX6.

In this case, should they use fly-by topology? or T-branch topology?

I feel fly-by topology is better because write leveling can use to it, but could you let me know Freescale recommendation?

 

 

 

Best Regards,

Satoshi Shimoda

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