iMx6 Master clock for clko_clk

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iMx6 Master clock for clko_clk

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deepanrajanbara
Contributor IV

Hi,

Ours is a custom board based on iMx6 and our customer request is to change the clko_clk from 24Mhz to 48Mhz.I have been trying to set the clock for the clko_clk.But not able to set the rate so can anyone tell me how to set the pixel clock or  master clock to 48Mhz and what i was trying was in Linux BSP version L3.0.35_4.1.0_130816 .

The location of the file is

/arch/arm/mach-mx6/clock.c

Can anyone help me in this

Thank you,

Deepanraj.A

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3 Replies

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igorpadykov
NXP Employee
NXP Employee

Hi Deepanraj

you can add codes to function in clock.c,

__raw_writel(dividerbyN, MXC_CCM_CCOSR);

one can check CCM_CCOSR sect.18.6.21 CCM Clock Output Source Register

(CCM_CCOSR) IMX6DQRM

I think you can set some root_clock for any unused peripheral to suitable value and output

it with CCM_CCOSR

Best regards

igor

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627 Views
deepanrajanbara
Contributor IV

Hi Igor

But actually i am trying to set 48Mhz but when i divide any of the clock am not able to get my required clock for the clk0_clk.

thank you,

Deepanraj

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627 Views
igorpadykov
NXP Employee
NXP Employee

Hi Deepanraj

you can try to output with CCM_CCOSR setting:

CLKO1_SEL=0000 pll3_sw_clk (this inputs has additional constant division /2)

CLKO1_DIV=100 divide by 5

(I believe in linux pll3_sw_clk = 480000000)

and this should result in 480000000/2/5=48 Mhz

Best regards

igor

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